Digital design

Subject description

VHDL: behavioral and structural modeling
Design of digital circuits on algorithmic level and RTL (register transfer level).
Simulation methods and "Testbench".
Synthesis modeling.
Programmable PLD circuits.
Fundamentals of programmable circuits FPGA.
Complex combinatorial arithmetic circuit in VHDL: Parallel counters, multipliers.
Design of finite state automata in VHDL.
Different implementations of finite state automata considering their specific properties.

Implementation of a complex digital system in VHDL.
Asynchronous circuits: Synthesis, Implementation.
CORDIC algorithms. Microprocessor.


The subject is taught in programs

Objectives and competences

The course objective is to familiarize students with modern procedures with design of complex digital system using programmable elements (FPGA, CPLD). The course comprises analysis and structure segment of combinatorial circuits, while the second part focuses on the analysis, description and design of synchronous digital circuits (counter, register) and finite state automata. The course gives a practical and theoretical insight into design and application of digital systems using modern tools for circuit synthesis (VHDL).

Teaching and learning methods

Course lectures provide practical and theoretical background on particular scope items together with presentation of simple practical examples. A complete study material is available to the students.
Practical work is tightly interwoven with course lectures being performed in the laboratory environment, and is accomplished in steps acquainting students with a programmable digital component (FPGA, CPLD) and corresponding instrumentation.

Expected study results

After successful completion of the course, students should be able to:

‐ Analyze and structure implementations of combinatorial structures (coder/decoder, comparator) into complex structures (e.g. combinatorial sorter),

– Synthesize more complex arithmetic circuits (adder/subtractor, comparator, CLA/RC/carry skip/carry select adder, arithmetic-logic unit, parallel counter and tree multiplier)

‐ Design and evaluate data/shift/universal register and implement different memory structures FIFO, LIFO and data encrypting (LFSR)

‐ Implement synchronous/asynchronous binary/BCD/ternary/quinary counter and implement different count modules/sequences/directions,

– Synthesize more complex Moore type finite state machines (> 100 states) and execute a classical synthesis using RTL components,

‐ Synthesize an algorithmic (ASM) and finite (FSM) state machine in HDL, simulate its behavior and implement into applied programmable digital circuit (FPGA/CPLD),

‐ Synthesize an asynchronous state machine, simulate its behavior and implement into applied digital circuits

– Synthesize and implement an embedded soft-core RISC microprocessor, design and map a peripheral unit into microprocessor address space and write assembler code for it.

Basic sources and literature

  1. Brown, Stephen D. Vranesic, Zvonko G. "Fundamentals of digital logic with VHDL design", 2005 McGraw-Hill, ISBN 007-246085-7  
  2. Katz, Randy H., Borriello, Gaetano "Contemporary logic design", 2005,
    Upper Saddle River: Pearson Prentice Hall, ISBN 0-201-30857-6        
  3. Mano, M. Morris, Kime, Charles R. "Logic and computer design fundamentals", 2008 Upper Saddle River : Pearson Prentice Hall, 978-0-13-206711-9     
  4. Parhami, Behrooz "Computer architecture : from microprocessors to supercomputers", 2005, Oxford University Press, ISBN 0-19-515455-X    
  5. Branko Šter, Ljubo Pipan: Digitalne strukture, Zapiski predavanj, 2008        
  6. Domača stran predmeta / Course homepage:

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