Module D: Testing of electronic circuits

Introduction: Role of testing, digital, analog and mixed signal test, VLSI technology trends affecting testing. 

Vlsi testing process and test equipment: How to test chips? Types of testing, automatic test equipment.  

Test economics and product quality: Test economics, costs of testing, yield,  defect level,  defect level estimation. 

Fault modeling: Types of defects, faults and errors, functional and structural testing, single stuck-at and multiple faults model, bridging fault model. 

Logic and fault simulation: Circuit modelling for logic simulation at different levels, algorithms for logic simulation, algorithms for fault simulation. 

Automatic test-patter generation: Definition of test-pattern generator, redundancy identification, systems for automatic test pattern generation, testing of synchronous and asynchronous sequential circuits. 

Memory test: Failure analysis, test methods of memory devices. 

Analog and mixed-signal test: Functional dsp-based testing, test methods of ADC and DAC devices, model-based testing. 

Delay test: Delay test problem, delay test methodologies, practical considerations in delay testing. 

Test iddq: IDDQ test principle and survey of IDDQ methods, effectiveness and limitations of IDDQ test. 

Design for testability: DFT methods and DFT rules, scan design rules, scan and partial-scan design, variations of scan designs. 

Built-in self-test (bist): The economic case of BIST, test-pattern generation for BIST, test points insertion, memory BIST.   

Boundary scan standard: Purpose of standard, circuit configuration with boundary standard IEEE 1149.1 (JTAG), analog test bus (ATB), targeted analog faults, boundary scan in analog circuits. 

System test: System test and core based design, functional and diagnostic test (fault dictionary, diagnostic tree, a microprocessor system test example), test architecture for system-on-a-chip (SOC). 

• To acquire the knowledge of reasons for circuit defects, errors and faults, their detection and diagnosis,
• knowledge on fault modelling for various design errors and circuit implementation defects,
• knowledge of fault simulation and automatic testpattern generation algorithms,
• knowledge of algorithms and methods for delay testing,
• to master techniques for circuit design for testability,
• practical approaches of design and test of electronic circuits.

Lectures (slides and blackboard), laboratory assignments (hands on fault detection and fault diagnosis in digital, analog and mixed-signal integratedcircuits.